The present disclosure relates to a direct current-to-direct current (DC/DC) converter.
In the past, various efficiency improving technologies have been proposed for a DC/DC converter that generates a desired DC output voltage from a DC input voltage.
For example, PCT Patent Publication No. WO2017/065220 (hereinafter referred to as Patent Document 1) by the applicant of the present application is directed to a control circuit for a DC/DC converter that includes a positive-channel (P-channel) transistor and a negative-channel (N-channel) transistor. The control circuit includes a pulse generator that generates a first pulse signal for designating turning on/off of a P-channel transistor and a second pulse signal for designate turning on/off of an N-channel transistor such that the state of the DC/DC converter or a load approaches a target value, a first driver that drives the P-channel transistor based on the first pulse signal, a second driver that drives the N-channel transistor based on the second pulse signal, and a common line connected to a lower side power supply terminal of the first driver and an upper side power supply terminal of the second driver. The voltage of the common line is stabilized to a predetermined voltage value between a voltage of a first line connected to an upper side power supply terminal of the first driver and a voltage of a second line connected to a lower side power supply terminal of the second driver.
When the gate voltage of the P-channel transistor is changed to a low level, discharge current is sunk by the first driver. Although the discharge current is discarded to the ground, in this mode, the discharge current is supplied to the common line and accumulated. Then, the second driver utilizes the sunken discharge current to drive the gate capacitance of the N-channel transistor. In particular, since driving current for the P-channel transistor can be recovered to the common line and re-utilized for the N-channel transistor, switching loss can be reduced. In addition, the gate voltage of the P-channel transistor swings with the voltage of the common line as a low level. Accordingly, switching loss of the P-channel transistor is reduced in comparison with that where the ground voltage is a low level. Similarly, the gate voltage of the N-channel transistor swings with the voltage of the common line as a high level. Accordingly, switching loss of the N-channel transistor is reduced in comparison with that where the power supply voltage is a high level.